The present invention relates to analog circuitry and more particularly to a technique for improving the performance of long channel devices.
Semiconductor manufacturers have increasingly turned to high-density Metal Oxide Semiconductor (MOS) arrays in their integrated circuit design schemes. To achieve a high-density integrated circuit, features such as metal-oxide semiconductor field-effect transistors (MOSFETs) must be as small as possible. Integrated circuit device geometries well below one micron feature sizes continue to become increasingly common. In general, the use of smaller devices oil integrated circuit chips results in better performance and high packing density, thereby reducing cost while increasing performance. However, with such small feature sizes, device performance is significantly impacted by physical effects which can be largely ignored with larger devices.
Small geometry devices exhibit a severe short channel effect, which manifests as a rapid drop of threshold voltage with decreasing channel length. In order to prevent subsurface leakage between source and drain, which is not controlled by the gate bias, one has to increase the dopant concentration of the channel. The side effect of this is that this dopant increase severely reduces drive currents. In order to avoid this problem halo or pocket implant are used since they don""t increase the channel resistance but are strategically placed to raise the potential barrier between the source and drain.
Halo/pocket implants are moderately doped implants of the same conductivity type at the well or substrate in which the transistor is formed, and which lie in a thin layer generally along the source drain to substrate well junctions. A combination of LDD structures and halo pocket implants has proven to achieve good device performance and reliability.
For an illustration of the conventional methodology please refer now to FIG. 1. FIG. 1 is a flowchart illustrating the conventional process steps for utilizing LDD structures and halo/pocket implants in the design of electric circuitry. First, a single continuous channel gate is provided within an active region on a substrate, via step 10. Next, halo/pocket and LDD implants are provided, via step 12. FIG. 2 shows the conventional channel gate structure 20.
Although halo/pocket and LDD implant work well with digital applications, halo/pocket and LDD implants are not suitable for analog applications where the channel gate length exceeds 0.75 xcexcm. This is because long channel gates that have undergone halo/pocket and LDD implants have a significantly smaller Early Voltage which is undesirable for analog circuits.
Early Voltage is a measure of the degree to which the base modulation effect (or Early effect, after the scientist who first correctly explained its basis) impacts the characteristics of a bipolar transistor. A large value of VA ( greater than 100 V) is desired in analog circuits for two reasons:
1. The open-circuit voltage gain, a0 (defined as the small-signal low-frequency voltage gain in the common-emitter configuration), is approximately found from:
a0=q VA/kT
where q is the elementary charge constant, k is the Boltzmann constant and T is temperature. Since a0 is the maximum voltage gain that can be obtained from a biolar transistor, it is a significant parameter in analog circuits. Because the above referenced equation indicates that a0 depends only on VA and TCa large value of VAwill permit larger voltage gains to be achieved.
2. Since xcex94VCE/xcex94IC=VA/IC=r0 (where r0 is the small-signal output resistance of the transistor in the common-emitter configuration), small values of VA imply a smaller output resistance, which is generally undesirable. Analog applications therefore require a minimum VA of 30 volts, while a lower voltage is normally acceptable for digital applications (15-20).
FIG. 3 shows a conventional plot of the Early Voltage. VA, vs. the channel length, Lpoly. As can he seen in FIG. 3, a device with a halo/pocket implant has a substantially lower VA than a device without a halo/pocket implant.
The halo/pocket implant results in a barrier at both ends of the channel and these barriers inhibit current flow. Increasing the drain voltage has the effect of reducing the barrier at the drain end of the transistor and increasing, the current. This results in a high output conductance value for the analog circuit. Since amplifier gain, G, is measured as
G=transconductance/output conductance
a high output conductance value results in a low amplifier gain. Consequently, because of the low amplifier gain, it is difficult to design useful analog applications.
According, what is needed is a system and method that allows for the effective use of halo/pocket and LDD implants in the design of analog circuitry without the aforementioned problems. The system and method should be easy to implement and cost effective. The present invention addresses such a need.
The present invention is a method of forming a channel device. The method comprises the steps of providing at least one active region on a substrate wherein the active region comprises a plurality of discontinuous gate structures. The method further comprises providing an ion implantation in the substrate.
In accordance with the present invention, a higher Early Voltage is achieved thereby enabling halo/pocket and LDD implants to be effectively utilized in the design of analog circuitry.